Biography
I am a senior GPU compiler performance engineer at Qualcomm. My responsibilities include performance characterization of GPU workloads (compute and graphics) with the goal of identifying bottlenecks and optimization opportunties to incorporate in the compiler design.
I received my PhD degree from the Electrical and Computer Engineering department at the University of British Columbia (UBC). My research topic focuses on promoting energy-efficiency in heterogeneous computing devices through better utilization of microarchitectural features such as fine grain frequency tuning and unified memory.
I received my BSc and MSc degrees in Electronics and Electrical Communications Engineering from Cairo University in 2012 and 2016 respectively. Before starting my PhD program in 2016 at UBC, I worked as a Research & Development engineer at Intel labs for two years (2012-2014), then as a Software Engineer at AvidBeam for another two years (2014-2016).
I led, and contributed to, several projects over the past ten years, spanning cognitive wireless communications systems, large-scale video analytics, compilers, and modeling performance and power consumption of different computing systems, including Supercomputers and Edge devices. I also had multiple successful collaborations with several research organizations and industry partners, and I had the honor of receiving several awards (scholarships, and grants) at UBC.
Download my resume.
- Compilers
- GPU Computing
- Heterogeneous Computing
- Performance Engineering
- Machine Learning
-
PhD in Electrical and Computer Engineering, 2023
University of British Columbia
-
MSc in Electronics and Electrical Communications, 2016
Cairo University
-
BSc in Electronics and Electrical Communications, 2007
Cairo University
Industry Experience
- Characterize GPU computer workloads performance behavior to identify bottlenecks and optimization opportunities.
- Prototype compiler optimizations that improve the performance of the target GPU workloads.
- Developed and implemented a proof-of-concept for efficient compiler-based data-dependency management algorithm for in-order instruction issue processors that led to up to 15% and average of 5% improvement in end-to-end latency across several benchmarks.
- Created and submitted an accepted patent application (currently in the filling process) for the algorithm.
- Evaluated the impact of re-ordering operands of associative instructions as a compiler optimization phase across several benchmarks, which allowed the management to make a well-informed decision before allocating resources and time for full scale implementation.
- Implemented and contributed several components from SPIR-V specification in MLIR project (part of the open-source LLVM project) which allowed me to achieve the contributor status in the LLVM project.
- Built an open-source profiling-based tool that allows developers and system designers to analyze the performance of GPU-accelerated applications in fields such as high-performance computing.
- Created and developed an analytical model for projecting intra-node connectivity impact on data transfer time in GPU-accelerated systems using data sheet information. The model projects data transfer times on next-generation nodes without actual deployment with error ranging from 19% to 23%.
- Took a leadership role in the development of a large-scale video analytics platform (ATUN). This platform currently serves as a base for scalable computer vision algorithms shipped by Avidbeam.
- Contributed in joint research and development effort between Avidbeam and Intel corporation to create a real-time large-scale video analytics platform, and participated in Network Function Virtualization project proposal which led to a collaborative proof-of-concept between international telecommunication service provider and Avidbeam.
- Developed several demos for Licensed Shared Access systems that were demonstrated at various Intel technology events such as Intel Developer Forum (IDF) and Research at Intel (R@I).
- Created algorithms for dynamically allocating radio spectrum using predictive machine learning algorithms which led to four publications and three granted patents.
Academic Experience
- Characterize and model deep-learning workloads on heterogeneous computing platforms to identify performance bottlenecks and optimize power-consumption to promote energy-efficient computing.
- Develop a statistical analysis-based methodology to study the inter and intra-node performance and power consumption variability amongst identical Edge computing devices.
- Study and instrument PyTorch framework Virtual Machine stack interpreter, part of the TorchScript module, to insert performance and kernel-level information gathering code that allows us to study deployed deep learning networks’ runtime behavior and hot kernels on CPU/GPU-based systems.
- Worked as a teacher assistant for four spring semesters for the Design of Distributed Software Applications undergraduate course (CPEN431).
- Provided guidance and assistance to students during lab hours and online to help them build an end-to-end distributed key-value store application.
- Built an automated grading software to reduce marking effort and time; And developed a software-based management tool for PlanetLab distributed computing resources. Managed our AWS cloud infrastructure that serves the course’s UI web-based services and testing software.